Le nouveau noyau Linux 5.3 apporte son lot de nouveautés pour l'architecture RISC-V dont le support ne cesse de s'améliorer.
- Hugepage support
- “Image” header support for RISC-V kernel binaries, compatible with the current ARM64 “Image” header
- Initial page table setup now split into two stages
- CONFIG_SOC support (starting with SiFive SoCs)
- Avoid reserving memory between RAM start and the kernel in setup_bootmem()
- Enable high-res timers and dynamic tick in the RV64 defconfig
- Remove long-deprecated gate area stubs
- MAINTAINERS updates to switch to the newly-created shared RISC-V git tree, and to fix a get_maintainers.pl issue for patches involving SiFive E-mail addresses
- Add support for the new clone3 syscall for RV64, relying on the generic support
- Add DT data for the gigabit Ethernet controller on the SiFive FU540 and the HiFive Unleashed board
- Update MAINTAINERS to add Paul Walmsley to the arch/riscv maintainers’ list
- Add support for PCIe message-signaled interrupts by reusing the generic header file